A digital imaging device may be arranged to produce digital image signals using multiple digital samples of pixel signals. FIG. 1 is a block diagram of an exemplary imaging sensor system 100. The system 100 includes an active pixel sensor array 101, which includes a plurality of pixels P arranged in an array. The array 101 is coupled via pairs of signal lines 111 to a plurality of sample-and-hold circuits 102a. The plurality of sample-and-hold circuits 102a are coupled to an analog-to-digital converter 102b via signal line 112a. The analog-to-digital converter 102b is coupled to a buffer 103 via data path 112b, and the buffer 103 is coupled to a signal processor 104 via a data path 113. The system 100 converts optical information focused upon the pixels P of the array 101 into a processed electronic signal S. The system 100 includes other well known components, such as a memory controller, a timing controller, a column decoder, and a row decoder, which are not illustrated in order to avoid cluttering the figure. The system 100 may also include additional components for further processing or using the signal S, such as mass storage devices, display drivers, etc.
Each pixel P of array 101 produces two signals, namely a reset signal Vrst and a photo signal Vsig. The reset signals Vrst of each pixel P in a selected row are simultaneously output via a respective column line 111 to a corresponding sample-and-hold circuit in the plurality of sample-and-hold circuits 102a. At a different time the photo signals Vsig of each pixel in the selected row are similarly output using respective lines 111. The sample-and-hold circuit 102a includes a differential amplifier output stage which subtract the reset and photo signals (Vrst−Vsig) which represent the incident light on a pixel.
The analog-to-digital converter 102b sequentially converts the electrical signal from each one of the sample-and-hold circuits 102a into digital form, and provides the digital data via data path 112b to a buffer 103.
The system 100 supports multiple sampling. Multiple sampling is a technique where multiple samples are taken of the same pixel and each sample is stored for further processing. When multiple sampling, the system repeatedly performs the above described processing so that each pixel has its photo and reset signal repeatedly read, converted to a single electric signal, and converted to digital form. The multiple digital values are stored in separate locations of the buffer 103 so that they can be separately accessed by the signal processor 104 over data path 113.
One reason for performing multiple sampling is to reduce the effect of noise. Since noise is a random signal, the noise component across several samples should at least partially cancel out. Thus, if multiple samples were summed and then divided by the number of samples, the noise components should be diminished and the resulting average value over the multiple samples should be a more accurate reflection of the true signal value.
The drawback to using multiple sampling is one of increased logic complexity. For example, the system 100 may utilize four times multisampling. That is, each pixel is sampled four times. In order to calculate an average value over four samples, the four samples must be summed, which requires the use of a wide adder. More specifically, for four times multiple sampling, the adder must be two bits wider than the full resolution of each sample. Another drawback of using multiple sampling is the increased communication bandwidth required to transmit the multiple samples from the buffer 103 to the signal processor 104. For example, four times multisampling requires four times the input-output bandwidth between the buffer 103 and the signal processor 104.